Microdisplay CMOS Backplane Architect

  • Google
  • Mountain View, California
  • Full Time
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Microelectronics, a related field, or equivalent practical experience.
  • 6 years of experience working in display-related silicon chip design, including experience in digital, analog and IC design.
  • Experience with product development for consumer electronic applications.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Microelectronics, or a related field, with a focus on integrated circuit design.
  • Experience with circuit simulation tools (e.g., Cadence Spectre, Synopsys HSPICE) and digital design flows (e.g., Verilog, VHDL).
  • Experience architecting CMOS backplanes for microdisplays, developing chip level specifications and with new product development.
  • Knowledge of pixel architectures and driving schemes for active matrix displays (e.g., memory in pixel, PWM driving scheme, field sequential, etc.).
  • Familiarity with SoC display pipeline and XR related applications/features.
  • Understanding of IC manufacturing processes and their impact on design.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Microdisplay Silicon Backplane Architect, you will help develop next generation products. In this role, you will lead microdisplay silicon architecture and specification, work with cross-functional partners and vendors for IC development, validate functionality and performance in modules and systems, aiming to deliver an industry leading display experience.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

The US base salary range for this full-time position is $174,000-$258,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .

  • Architect and define innovative microdisplay CMOS backplane ICs.
  • Investigate and prototype new features (FPGA or modeling).
  • Design and analyze critical analog and digital circuit blocks within the display IC.
  • Develop IC engineering requirements specifications, work with vendors and partner teams during all stages of silicon development and validate functionality and performance at module and system levels.
  • Investigate roadmap opportunities related to CMOS process technologies and advanced packaging for next generation designs.
Job ID: 479089736
Originally Posted on: 5/30/2025

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