Sr. Staff Analog/Mixed Signal Design Engineer

Sr. Staff Analog/Mixed Signal Design Engineer
Location: San Jose, CA 95134
Duration: 12 months

Pay Range - $80/hr - $100/hr

Description
Sr. Staff Analog/Mixed Signal Design Engineer, you will actively work on architecture and design of high-speed interconnect transceiver (Serdes).
You will work on circuits for Serdes IPs, Clock generation as well as traditional analog circuits.
Design/optimize the circuit to meet specification.
Floor planning and layout supervision.
Participate in silicon bring-up, validation and debug.
Contribute in architecture and specs.

Requirements
What You Bring MS (Ph.D, preferred) or similar background/experience
Minimum 7+ yrs experience RF/Analog/Serdes SoC design experience.
Knowledge and experience with analog circuits/mixed-signal circuits: such as bandgap, LDO, filters.
Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe).
Knowledge and experience with ESD, PLL, clock generation, Client, DAC is a big plus.
Well-versed in EDA tools (Cadence, Spectre, Totem, EMX) Comfortable with scripting languages (Python, MATLAB).