MTS Design Engineer, HMB

Development includes defining requirements, developing specifications, architecting clock buffering, being responsible for circuit development, simulations across the product envelope, guiding physical layout, supervising cross talk, and driving validation! MS or PhD in Electrical Engineering with 15+ year of proven experience Excellent verbal and written communication skills 10+ years of high speed I/O design Hands on experience in High-Speed IO PHY architecture definition Proven understanding of industry HSIO protocols like DDR, PCIe, USB, SATA, MIPI 15+ years of proven experience in high-speed interface architecture definition In-depth knowledge of I/O post-Silicon validation methodologies In-depth knowledge of industry standard HSIO architecture 10+ years of proven experience in memory address and data path architecture/design Deep understanding of signal integrity, channel characteristics, and ESD design techniques and topologies.