- Engage in full life cycle development and integration of Verilog/VHDL into different families of FPGAs.
- Demonstrate a firm understanding of the FPGA design process, including requirements, preliminary design, peer reviews, detailed design, test plan generation, integration, and testing.
- Perform architectural design, including block diagram creation, trade-off studies, and design reviews.
- Create self-checking and reusable test benches from scratch.
- Develop functional coverage models and ensure closure of code coverage.
- Create and document written test cases and procedures, and record results.
- Integrate with hardware/software for lab integration and complete testing/qualification of a deliverable system.
- Support board-level FPGA integration.
- Conduct detailed design reviews.
- Foster a collaborative culture by treating all team members with respect and dignity.
- Bachelors degree in aerospace engineering, computer science, or another relevant STEM field. Experience in lieu of education may be considered.
- Experience with FPGA, VHDL, Verilog, ASIC, Xilinx, and Altera.
- Proficiency in Verilog or VHDL.
- Experience with hand-coded implementations beyond incorporating vendor COTS IP.
- Testbench development for the verification of RTL blocks.
- Familiarity with FPGA simulation and synthesis tools like Questasim, Synplify, Xilinx ISE, and Vivado.
- Experience in verifying ASICs / FPGAs.
- Proficiency in Microsoft 365, including Excel, Word, Outlook, and Teams.
- Experience with building and setting up scalable simulation/verification environments.
- Experience with revision control systems such as svn and git.
- Proficiency in Linux environments.
- Experience with high-speed serial protocols like PCI Express, SRIO, Ethernet, LVDS, and CameLink.
- Experience with Analog to Digital (AD) and Digital to Analog (DA) interfaces.
- Experience with control protocols such as I2C, SPI, RS-232/422.
- Experience with Unix, scripting in C, Python, bash/csh.
- Experience with embedded System-On-Chip technologies and radio systems development.
The work environment involves hands-on FPGA lab validation. The position promotes a collaborative culture and encourages continual improvement of service quality, ensuring the delivery of products and services that exceed customer expectations.
Pay and Benefits The pay range for this position is $45.00 - $52.00/hr.Eligibility requirements apply to some benefits and may depend on your jobclassification and length of employment. Benefits are subject to change and may be
subject to specific elections, plan, or program terms. If eligible, the benefits
available for this temporary role may include the following: Medical, dental & vision
Critical Illness, Accident, and Hospital
401(k) Retirement Plan Pre-tax and Roth post-tax contributions available
Life Insurance (Voluntary Life & AD&D for the employee and dependents)
Short and long-term disability
Health Spending Account (HSA)
Transportation benefits
Employee Assistance Program
Time Off/Leave (PTO, Vacation or Sick Leave) Workplace Type This is a fully onsite position in Merritt Island,FL. Application Deadline This position is anticipated to close on Jun 10, 2025. About Actalent
Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500.
The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.
If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing due to a disability, please email ... for other accommodation options.