Principal RFIC Design Engineer

RESPONSIBILITIES Design, simulate, and verify CMOS RFIC (eg, LNA, mixer, power amplifier, and PLL) Provide guidelines of floor plan and layout for CMOS RFIC Provide guidelines of silicon package and PCB layout for CMOS RFIC Participate in measurement, characterization, and debugging of silicon Work within a cross-functional team Willing to travel to Asia REQUIREMENTS MS in Electrical Engineering 5+ years' experience in design of CMOS RFIC for 2G/3G/4G mobile handsets (eg GSM, CDMA, GPRS, UMTS, and LTE), with proven success in mass production In-depth understanding of deep submicron CMOS process and related circuit design issues Familiar with Cadence custom design tools and circuit simulator Solid knowledge of link budget for RF transceiver is a plus Solid understanding of transmission line and EM wave theory is a plus Experience in custom on-chip inductor/transformer design is a plus Experience in dealing with on-chip noise coupling issues is a plus Experience in PCB layout and/or IC package design is a plus