Job Description As an FPGA Design Engineer, you will play a key role in shaping a mission-critical communication system for Canada's next-generation fleet of protection vessels. Your contributions will help ensure these ships maintain secure and reliable communications under any conditions. Working as part of a collaborative, multi-disciplinary design team, you will be responsible for designing, developing, simulating, and integrating complex FPGA solutions tailored to specific project requirements. Responsibilities
- Create FPGA Models: Transform RTL designs into FPGA models using synthesis, partitioning, and routing tools.
- Develop & Debug: Integrate, test, and debug hardware and software in both simulation and FPGA environments.
- Testing & Verification: Write tests, develop test environments, and support the verification of hardware, software, and firmware.
- Automation & Optimization: Develop and use automation tools, flows, and scripts to enhance FPGA utilization.
- Design Tools: Utilize FPGA design tools to fit designs, close timing, and improve fitting quality.
- Innovate: Contribute ideas to advance FPGA development processes.
- Digital Systems: Design, implement, integrate, and test digital systems with a focus on FPGA technology.
- Code Development: Create Verilog, VHDL, HDL, and graphical designs for FPGAs.
- IP Core Integration: Integrate manufacturer IP FPGA cores (processors, ADCs, DACs, etc.) into custom firmware architectures.
- Simulation and Validation: Design and validate testbench routines for simulating FPGA designs and sub-designs.
- Firmware Integration: Integrate firmware with target hardware, ensuring compatibility with system components and software.
- Timing Analysis: Generate timing constraints for IP blocks and perform Static Timing Analysis.
- 7+ years of FPGA design experience and capability of performing FPGA verification (UVM is a strong asset).
- Experience using AXI protocol utilized in high-speed communication.
- Proficiency in using the Vivado Design suite/tools.
- Bachelors degree or higher in Electrical Engineering, Computer Engineering, or related field.
- Experience with design isolation is an asset.
- Understanding of Static Timing Analysis and Timing Closure techniques.
- FPGA project documentation (Block Diagram, FSM Design, etc) is an asset.
- Knowledge of UVM functional simulation is an asset.
- Knowledge of MPSoC devices.
- Design, build, and test scripting experience (TCL, Python).
- Experience with hardware debugging tools such as logic analyzers, oscilloscopes, and JTAG.
- Experience with GIT pipelines is an asset.
- Bonus points for knowledge in digital audio signal processing.
- Must be eligible for Secret clearance.
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About ActalentActalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 30,000 consultants and more than 4,500 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing winner for both client and talent service.
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